The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method and structure for increasing charge trapping capability in a semiconductor charge storage device. Merely by way of example, the invention has been applied to dynamic random access memory (DRAM) application. But it would be recognized that the invention has a much broader range of applicability.
Semiconductor memory devices are commonly used many applications in digital electronics. One specific type of semiconductor memory device, dynamic random access memory, often known as DRAM, is often used in computer main memory, video processing, HDTV, etc. Therefore, DRAM plays an increasingly important role in modern electronic systems. On the other hand, conventional DRAM suffers from many limitations.
Specifically, conventional DRAM includes an MOS capacitor for charge storage and a transistor for access control. Because the capacitor tends to lose charges, conventional DRAM requires frequent refreshing operation to replenish lost charges. Continued miniaturization of a conventional DRAM cell also tends to be restricted by the size storage capacitor that is required to hold a minimum amount of charges.
Accordingly, there is a need for improved techniques for a semiconductor charge storage device.